tag:blogger.com,1999:blog-28344720.post1670860741493121674..comments2024-02-21T06:47:29.430-07:00Comments on Chip Overclock<sup><small>®</small></sup>: Small is Beautiful, but Many is ScaryChip Overclockhttp://www.blogger.com/profile/11195242013008369733noreply@blogger.comBlogger3125tag:blogger.com,1999:blog-28344720.post-56802121597632864772007-02-14T12:58:00.000-07:002007-02-14T12:58:00.000-07:00Embedded developer and long-time adopted nephew To...Embedded developer and long-time adopted nephew Todd Blachowiak offers the following comments, echoing many of the same thoughts as Mr. Tarr:<BR/><BR/>I'm not sure I buy into the homogenous massively multi-core model for the embedded world. Much of the embedded world is also dealing with external devices, so a model of two CPU classes makes more sense to me. One class that is optimized to deal Chip Overclockhttps://www.blogger.com/profile/11195242013008369733noreply@blogger.comtag:blogger.com,1999:blog-28344720.post-49958089324162303732007-02-13T13:41:00.000-07:002007-02-13T13:41:00.000-07:00Having stood in both the HPC world and in the embe...Having stood in both the HPC world and in the embedded world, I get your drift. There are a lot of commonalities between these two worlds, but most of the time they don't even realize the other exists. However this Berkeley paper surprised me in that it explicitly stated that many of their ideas were drawn from the embedded world. The paper mentions specifically that the traditional embedded Chip Overclockhttps://www.blogger.com/profile/11195242013008369733noreply@blogger.comtag:blogger.com,1999:blog-28344720.post-75242850274423330592007-02-13T13:34:00.000-07:002007-02-13T13:34:00.000-07:00When space cowboy Steve Tarr isn't sending mission...When space cowboy Steve Tarr isn't sending missions to deep space, he comments on my blog:<BR/><BR/>A comment on your "Small is Beautiful..." article. I think the Berkeley folks see the big picture (having not read their work), but I think your example is on the fringe. The many are the ubiquitous micro-controllers and in ever increasing ASIC/FPGA implementations. The future is not a bunch of Chip Overclockhttps://www.blogger.com/profile/11195242013008369733noreply@blogger.com