I'll be giving a talk on Implications of Memory Models (or Lack of Them) for Java, C, and C++ Developers at Avaya Inc. at 120th and Pecos in Westminster, Colorado, on Thursday, April 5, from 1500 to 1600, in the auditorium.
(Chip Overclock) will discuss why the Double Checked Locking Pattern, which he used to implement lazy singetons in several commercial products, doesn’t work reliably on modern processors. He will describe how he constructed an object in C++ on a single-core hyperthreaded processor only to find upon using that object that its virtual table apparently hadn’t been initialized. Modern microprocessors implement memory models such that what you may think is happening maybe isn’t happening when you think it is. Wackiness ensues. More restrictive approaches to multi-threaded design are necessary, even on single-core processors.
It's not open to the public, but the slides (which I updated yesterday, for those of you that can attend) are available on the Digital Aggregates web site here.